Digital Computer Organization
Course Code: |
DIGITAL COMPUTER ORGANIZATION
|
L |
T |
P |
C |
|
|
3 |
0 |
0 |
3 |
Pre-requisites/Exposure |
Nil |
||||
Co-requisites |
Nil |
Catalog Description
The Objective of this course is to expose the students to the fundamentals and the concepts of Digital & Computer Organization and Representation of Information and Basic Building Blocks, Basic Organization, Memory Organization, Input-Output Organization, Processor Organization etc. This course is designed to understand the concepts of Computer Organization for Research & Development as well as for application.
Course Objectives
The objective of this course is to
- An understanding of a machine’s instruction set architecture (ISA) including basic instruction fetch and execute cycles, instruction formats, control ow, and operand addressing modes.
Course Outcomes
On completion of this course, the students will be able to:
CO1: Understand and Interpret the functional architecture of computing systems.
CO2. Identify, compare and assess issues related to ISA, memory, control and I/O functions.
CO3. Understand the general concepts in digital logic design, including logic elements, and their use in combinational and sequential logic circuit design.
CO4. Design and analyse solutions in the area of computer architecture.
Modules |
Blooms level* |
Number of hours |
MODULE 1: Representation of Information and Basic Building Blocks Overview of Computer hardware generation, Number Systems, Binary, Octal, Hexadecimal, Character Codes (BCD, ASCII, EBCDIC), Logic gates, Boolean algebra, K-map Simplification, Half adder, Full adder, Decoders, Multiplexes, Binary Counters, Flip/Flops, Registers, Counters (Synchronous & Asynchronous), ALU, Micro-Operation, ALU-chip, Faster Algorithm and Implementation (multiplication & Division).
|
L1, L2 and L3 |
7 |
MODULE 2: Basic Organization Von Neumann Machine (IAS Computer), Operational flow chart (Fetch, Execute), Instruction Cycle, Organization of Central Processing Unit, Hardwired and Micro programmed control unit, Single Organization, General Register Organization, Stack Organization, Addressing Modes, Instruction Formats, Data transfer & Manipulation, I/O organization, Bus Architecture, Programming Registers. |
L1,L2,l3 |
8 |
MODULE 3: Memory Organization Memory hierarchy, Main Memory (RAM/ROM chips), Auxiliary memory, Associative memory, Virtual memory, Cache memory, Memory management hardware, hit/miss ratio, Magnetic disk and its performance, Magnetic Tapes etc.
|
L1, L2 and L3 |
8 |
MODULE 4: Input-Output organization Peripheral devices, I/O interface, Direct memory access, Modes of transfer, Priority Interrupt, I/O Processors, Serial Communication, Asynchronous data transfer, Strobe Control, Handshaking, I/O Controllers.
|
L1, L2 |
7 |
MODULE 5: Processor Organization Basic Concept of 8/16-bit microprocessor (8085/8086), Assembly Instruction Set, Assembly Language Program of 8085/8086: Addition of two numbers, Subtraction, Block Transfer, Find greatest number, Table search, Numeric manipulation, Introductory Concept of pipeline, Flynn’s Classification, Parallel Architectural classification.
|
L2,L4 |
6 |
*Bloom’s Level:
L1:-Knowledge; L2:Comprehension; L3:Application; L4:Analysis; L5:Synthesis, L6:Evaluation
Text Books
- M. Moris Mano, “Computer Systems Architecture”, 4th Edition, Pearson/PHI, ISBN:10:013175563
- Carl Hamacher, Zvonko Vranesic, Safwat Zaky, “Computer Organization”, 5 th Edition, McGraw Hill
.Reference Books
- Computer Organization: Vrarsie, Zaky&Hamacher (TMH Publication).
- Tannenbaum, “Structured Computer Organization”, PHI.
Modes of Evaluation: Quiz/Assignment/ Seminar/Written Examination
Examination Scheme:
Components |
A |
CT |
S/V/Q |
HA |
EE |
Weightage (%) |
5 |
10 |
8 |
7 |
70 |
A: Assignment, CT: Class Test, S/Seminar, V: Viva, Q: Quiz, HA: Home Assignment, EE: End Exam |
CO, PO and PSO mapping
|
PO1 |
PO2 |
PO3 |
PO4 |
PO5 |
PO6 |
PO7 |
PO8 |
PO9 |
PO10 |
PO11 |
PO12 |
PSO 1 |
PSO 2 |
PSO 3 |
PSO4 |
CO1 |
2 |
– |
3 |
— |
— |
— |
— |
— |
— |
— |
— |
— |
2 |
1 |
– |
– |
CO2 |
2 |
2 |
3 |
– |
— |
— |
— |
— |
— |
— |
— |
— |
2 |
1 |
2 |
– |
CO3 |
2 |
– |
3 |
– |
– |
— |
— |
— |
— |
— |
— |
— |
2 |
1 |
2 |
– |
CO4 |
2 |
– |
3 |
– |
– |
— |
— |
— |
— |
— |
— |
— |
2 |
1 |
|
– |
1: strongly related, 2: moderately related and 3: weakly related